Big Core x Most Efficient
NPU Core-JIUSHAO
Design and integrate industry-leading big-core architecture NPU, providing extremely high efficiency
Supports a mix of INT8/FP8/FP16 precision
Specialized in accelerating high-precision vectorization and Transformer
High Performance x Cost-Effective
3-Level Memory Hierarchy
High capacity and high bandwidth, dedicated NPU memory
High capacity, shared memory within the core modules
Deeply optimized DDR bandwidth utilization
Design for High-Level Autonomous
Driving x Future-Oriented Design
Focuses on the latest advanced algorithms such as BEV+Transformer, Multi-Modal LM, E2E
Supports high-speed, consistent inter-chip communication, and highscalability for future long-term computing power evolution
Automotive Safety Breakthrough
Supports redundancy-based safety NPU
The entire chip process complies with auto-grade, ensuring uncompromised safety