Application scalability, optimized autonomous-driving chip, design for ADAS/AD
Platform solution could cover L2+ and above ADAS/AD applications.
Rich IO interfaces, supporting multi-chips cascade extension.
Support multi-sensor interfaces based on high performance ISP
Support access of hybrid sensors of camera, Lidar, millimeter wave radar.
The high performance NeurallQ ISP can support up to 16 channels
processing of high resolution dynamic imaging in real time with 1.2 Gpps.
Embedded high performance CV accelerator and 4k video encoder and decoder engine.
High computing power, high energy efficiency, multi-dimensional heterogeneous architecture of AI
and CV accelerators
Up to 58 TOPS(INT8) to 116 TOPS(INT4) accelerator,
more than 5 TOPS/W computation-energy ratio
Symmetric multi-cores high performance DSP, CV accelerating cores
High performance 8 cores ARM Cortex A55 Processor @1.5GHz
Architecture, process, design and certification for driving safety
AEC-Q100 G2, ISO26262 ASIL-B
Integrated independent safety and security MCU
Support automotive grade dual channels 32 bit LPDDR4
Automotive grade package，
Improve the final yield of the product, also supports passive heat removal
• Multi-level caches
• 16 channels HD camera input
• Support 8MP
• 3-exposure HDR，up to 140dB dynamic range
• Offline low-light denoising and LED flash suppression
• Mix of inline and offline processing mode
• 5 cores high performance vision DSP
• CV Hardware acceleration
• H.264/H.265 video encoder and decoder for 4k video
Typical power consumption 18W
FCBGA 25mm*25mm, 0.8mm pitch
Environment-40°C ~ 105 °C with passive heat removal
• Hybrid precision 4-bit/8-bit MAC Array
• Perform up to 58 TOPS(INT8)~ 116 TOPS(INT4)
• Energy efficiency>5 TOPS/Watt (INT8)
• Overall 80% utilization of convolution layers MAC Array.
• Sparse support for storage and acceleration.
• Int 8/16-bit、floating 16 bit GEMM and Nonlinear functions acceleration.
• Open-source DynamAI NN compiler tools.
• Verified by ISO26262ASIL-B and AEC-Q100 Grade-2 standard
• Security MCU with dual-cores lockstep
• Real time security monitoring and inspection
• Embedded safety guard mechanism involving ECC、Parity
• Secure booting
• OTP on chip for Private-key storage and life-cycle management
• 1x PCIe Gen3 4L or 2x PCIe Gen3 2L, and can be managed as Root Complex or Endpoint port
• USB3.0 DRD and USB2.0 device
• 10/100/1000Mbps automotive grade Ethernet